Flash memory arrangements have many different uses, including data storage for portable devices or other devices in which storage size, weight and/or power consumption is a factor. As shown with regard to background art FIG. 1, a typical flash memory arrangement 10 features a port 12 for accessing data, including both reading and writing data. The data itself is stored in a flash memory 14, which is accessible by a CPU 16 through port 12. CPU 16 is able to read and write data through port 12, by communicating with an internal processor 18. CPU 16 sends the appropriate commands to read or write data from a particular address through a bus 17. Reading and writing such data may be typically accomplished according to protocols which are known in the art, with one exception: executable code.
Executable code is actually a series of instructions which are executed by a data processor, such as CPU 16. Such executable code is required for running software programs, and for “booting” the computational device which contains CPU 16 and flash memory arrangement 10. Typical “boot” operations include initialization of the hardware components of the computational device and also loading of required software program(s). Therefore, the ability to execute instructions for booting a computational device is a clear advantage for memory components such as flash memory arrangement 10, particularly in hardware implementations in which flash memory arrangement 10 is intended to substitute for other, heavier or otherwise less suitable memory storage components, such as a magnetic medium hard disk for example.
Unfortunately, certain types of flash memory do not permit the direct execution of code from the memory, or “execution in place” of the code. For example, NAND flash does not permit such direct execution of code. Instead, as shown with regard to FIG. 1, the code must be loaded by CPU 16 from flash memory arrangement 10 to a RAM (random access memory) 22 according to code which is present in an EPROM 24. Other types of memory which may be used are ROM and Nor-flash. In this example, the initial code must be loaded to EPROM 24, since flash memory 14 is a NAND-type flash memory, which requires any data to be read in blocks. Thus, initialization must occur through an additional memory component, such as EPROM 24, which is not a desirable solution since it requires another component to be added to the device. Indeed, in this example, flash memory 14 is optional, since flash memory 14 cannot participate in the boot process.
Other possible solutions include using NOR-flash, which does permit execution in place, as variably-sized blocks of code may be read, but which is less desirable as it is more expensive than NAND flash. A different component than an EPROM may be used, but the requirement for any type of additional memory component is less desirable as it adds to the cost and complexity of manufacture. Unfortunately, there is currently no solution to this problem.